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authorScott Duplichan <scott@notabs.org>2011-02-24 05:00:33 +0000
committerScott Duplichan <scott@notabs.org>2011-02-24 05:00:33 +0000
commita649a96efe9cf345ade3e7a0463507f9e4360ef0 (patch)
treebe6f53238175da51fd1002ed243a2bfa482d1e90 /src/mainboard/asrock/e350m1/pmio.c
parent71b8480921731c20521b80acae2db9d622acfa05 (diff)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6376 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asrock/e350m1/pmio.c')
-rw-r--r--src/mainboard/asrock/e350m1/pmio.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/src/mainboard/asrock/e350m1/pmio.c b/src/mainboard/asrock/e350m1/pmio.c
new file mode 100644
index 0000000000..baded54ba6
--- /dev/null
+++ b/src/mainboard/asrock/e350m1/pmio.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+
+#include <arch/io.h> /*inb, outb*/
+#include "pmio.h"
+
+static void pmio_write_index(u16 port_base, u8 reg, u8 value)
+{
+ outb(reg, port_base);
+ outb(value, port_base + 1);
+}
+
+static u8 pmio_read_index(u16 port_base, u8 reg)
+{
+ outb(reg, port_base);
+ return inb(port_base + 1);
+}
+
+void pm_iowrite(u8 reg, u8 value)
+{
+ pmio_write_index(PM_INDEX, reg, value);
+}
+
+u8 pm_ioread(u8 reg)
+{
+ return pmio_read_index(PM_INDEX, reg);
+}
+
+void pm2_iowrite(u8 reg, u8 value)
+{
+ pmio_write_index(PM2_INDEX, reg, value);
+}
+
+u8 pm2_ioread(u8 reg)
+{
+ return pmio_read_index(PM2_INDEX, reg);
+}
+