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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-10-08 20:17:14 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-10-08 20:17:14 +0000
commitebb43d69439d847e87e18ac332e71b9b0476936a (patch)
treee267ec0e6831b74e0b70d6a18a612de93229bd28 /src/mainboard/artecgroup/dbe61/Kconfig
parente3fcd45a7fa450cc5befdcc8bcfa7d8541f4e81e (diff)
Fix CS5535 build for kconfig, more kconfig boards (lippert, artec)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/artecgroup/dbe61/Kconfig')
-rw-r--r--src/mainboard/artecgroup/dbe61/Kconfig47
1 files changed, 47 insertions, 0 deletions
diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig
new file mode 100644
index 0000000000..6caef7bba8
--- /dev/null
+++ b/src/mainboard/artecgroup/dbe61/Kconfig
@@ -0,0 +1,47 @@
+config BOARD_ARTECGROUP_DBE61
+ bool "dbe61"
+ select ARCH_X86
+ select CPU_AMD_LX
+ select NORTHBRIDGE_AMD_LX
+ select SOUTHBRIDGE_AMD_CS5536
+ select HAVE_PIRQ_TABLE
+ select PIRQ_ROUTE
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+ select USE_DCACHE_RAM
+ select USE_PRINTK_IN_CAR
+
+config MAINBOARD_DIR
+ string
+ default artecgroup/dbe61
+ depends on BOARD_ARTECGROUP_DBE61
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "DBE61"
+ depends on BOARD_ARTECGROUP_DBE61
+
+config HAVE_OPTION_TABLE
+ bool
+ default n
+ depends on BOARD_ARTECGROUP_DBE61
+
+config IRQ_SLOT_COUNT
+ int
+ default 3
+ depends on BOARD_ARTECGROUP_DBE61
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_ARTECGROUP_DBE61
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x8000
+ depends on BOARD_ARTECGROUP_DBE61
+
+config RAMBASE
+ hex
+ default 0x4000
+ depends on BOARD_ARTECGROUP_DBE61