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authorAndrey Petrov <andrey.petrov@intel.com>2016-05-26 15:29:15 -0700
committerMartin Roth <martinroth@google.com>2016-05-31 20:06:29 +0200
commit204af8157dd4d4d2b295159628419812ec6a2816 (patch)
tree14465c25cd6bfcfa1d91945f18109427cdf0d9f0 /src/mainboard/amd
parentb28a411362828b5d64220e15b0be8143709e083a (diff)
soc/intel/apollolake: Update SPI memory mapping constraints
MMIO region of 256 KiB under 4 GiB is not decoded by SPI controller by hardware design. Current code incorrectly specifies size of that region to be 128 KiB. This change corrects the value to 256 KiB. Change-Id: Idcc67eb3565b800d835e75c0b765dd49d1656938 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14979 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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