AMD Brazos/Trinity boards: PlatformGnbPcie.c: Reserve correct amount of memory

In `PlatformGnbPcie.c` AGESA functions are used to reserve memory
space to save the PCIe configuration to. This is the

With the following definitions in `AGESA.h`

    $ more src/vendorcode/amd/agesa/f14/AGESA.h
    […]
    /// PCIe port descriptor
    typedef struct {
      IN       UINT32               Flags;                    /**< Descriptor flags
                                                               * @li @b Bit31 - last descriptor in complex
                                                               */
      IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
      IN       PCIe_PORT_DATA       Port;                     ///< PCIe port specific configuration info
    } PCIe_PORT_DESCRIPTOR;

    /// DDI descriptor
    typedef struct {
      IN       UINT32               Flags;                    /**< Descriptor flags
                                                               * @li @b Bit31 - last descriptor in complex
                                                               */
      IN       PCIe_ENGINE_DATA     EngineData;               ///< Engine data
      IN       PCIe_DDI_DATA        Ddi;                      ///< DDI port specific configuration info
    } PCIe_DDI_DESCRIPTOR;

    /// PCIe Complex descriptor
    typedef struct {
      IN       UINT32               Flags;                    /**< Descriptor flags
                                                               * @li @b Bit31 - last descriptor in topology
                                                               */
      IN       UINT32               SocketId;                 ///< Socket Id
      IN       PCIe_PORT_DESCRIPTOR *PciePortList;            ///< Pointer to array of PCIe port descriptors or NULL (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
      IN       PCIe_DDI_DESCRIPTOR  *DdiLinkList;             ///< Pointer to array DDI link descriptors (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST).
      IN       VOID                 *Reserved;                ///< Reserved for future use
    } PCIe_COMPLEX_DESCRIPTOR;
    […]

memory has to be reserved for the `PCIe_COMPLEX_DESCRIPTOR` and,
as two struct members are pointers to arrays with elements of type
`PCIe_PORT_DESCRIPTOR` and `PCIe_DDI_DESCRIPTOR`, space for these
times the number of array elements have to be reserved:
a + b * 5 + c * 2.

      sizeof(PCIe_COMPLEX_DESCRIPTOR)
    + sizeof(PCIe_PORT_DESCRIPTOR) * 5
    + sizeof(PCIe_DDI_DESCRIPTOR) * 2;

But for whatever reason parentheses were put in there making this
calculation incorrect and reserving too much memory.

    (a + b * 5 + c) * 2

So, remove the parentheses to reserve the exact amount of memory
needed.

The ASRock E350M1 still boots with these changes. No changes were
observed as expected.

Rudolf Marek made this change as part of his patch »ASUS F2A85-M:
Correct and clean up PCIe config« [1]. Factor this hunk out as it
affects all AMD Brazos and Trinity based boards.

[1] http://review.coreboot.org/#/c/3194/

Change-Id: I32e8c8a3dfc5e87eb119eb17719d612e57e0817a
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3239
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>

1 files changed, 3 insertions, 3 deletions

diff --git a/src/mainboard/amd/thatcher/PlatformGnbPcie.c b/src/mainboard/amd/thatcher/PlatformGnbPcie.c
index 153b13daa6..2aee86e049 100644
--- a/src/mainboard/amd/thatcher/PlatformGnbPcie.c
+++ b/src/mainboard/amd/thatcher/PlatformGnbPcie.c
@@ -137,9 +137,9 @@ OemCustomizeInitEarly (
 	//
 	// Allocate buffer for PCIe_COMPLEX_DESCRIPTOR , PCIe_PORT_DESCRIPTOR and PCIe_DDI_DESCRIPTOR
 	//
-	AllocHeapParams.RequestedBufferSize = (sizeof (PCIe_COMPLEX_DESCRIPTOR)  +
-					       sizeof (PCIe_PORT_DESCRIPTOR) * 7 +
-					       sizeof (PCIe_DDI_DESCRIPTOR)) * 3;
+	AllocHeapParams.RequestedBufferSize = sizeof (PCIe_COMPLEX_DESCRIPTOR)  +
+					      sizeof (PCIe_PORT_DESCRIPTOR) * 7 +
+					      sizeof (PCIe_DDI_DESCRIPTOR) * 3;
 
 	AllocHeapParams.BufferHandle = AMD_MEM_MISC_HANDLES_START;
 	AllocHeapParams.Persist = HEAP_LOCAL_CACHE;