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authorJonathan Zhang <jonzhang@fb.com>2020-04-10 15:48:06 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-14 16:46:15 +0000
commit3a6d8fd88994725f19bfc0e5555cd1bdd6eef4f0 (patch)
treef0d448c5190ae5d9bb1b12b11030ca5d41e9400d /src/mainboard/amd/parmer
parentc11059550342999c382385ef0059349802061a99 (diff)
soc/intel/xeon_sp/cpx: configure FSP-M UPD parameters
Configure FSP-M UPD parameters. TESTED=Boot CPX-SP based server. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com> Change-Id: I2d0762a742d8803c7396034e3244120c1e8ece67 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40385 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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