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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-06 16:13:07 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-07 10:38:26 +0000 |
| commit | 5bd926428eb0972074ec056835eb0f85984846d3 (patch) | |
| tree | 39ec9a805f2a92b2d178dfdd214900ca04458b05 /src/mainboard/amd/gardenia/board_info.txt | |
| parent | 954ed5500c2d8d2284b65689b720ca1530c28b25 (diff) | |
usbdebug: Sanity check PCI EHCI location
If requested EHCI function is not on bus 0, we would
need to open MMIO windows and configuration register
space for the connected upstream PCI bridge for it
to work. We don't plan to do so.
Change-Id: I7c1c60f9d9890dedfedc9d977faf5152ba362692
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/amd/gardenia/board_info.txt')
0 files changed, 0 insertions, 0 deletions