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authorDuncan Laurie <dlaurie@chromium.org>2012-10-03 19:23:11 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-12 03:34:03 +0100
commit836db26b1cd5ebf712f0e847e6f3db87f1204fa2 (patch)
treea95b9e791db069a9f5db41c83a37f0554b4ac4d4 /src/mainboard/advantech
parentf5a11aa82f66a77a4b79b602604a8516ca187c3b (diff)
ACPI: Zero pstate/cstate control values in FADT
If these values are non-zero then the kernel will issue an SMI for each core (cstate) and package (pstate). Since we don't do anything with these SMI callbacks we can avoid taking the extra SMIs at boot time by zeroing these fields. Change-Id: I3bc5fe0a9f45141d46884cb77ecdfaeaa45d2439 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1769 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/advantech')
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