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authorDuncan Laurie <dlaurie@chromium.org>2012-06-23 15:09:34 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-24 23:40:54 +0200
commitd2e00b92ce0d3b60b7467ff51d3184d9c57dcb10 (patch)
tree7d7b280ca407dce51a898344d0c0928df73b514f /src/mainboard/advansus
parent4e4320f524a4695b5987e6bbffcfc48af89dac26 (diff)
SMM: Add heap region and move C handler higher in region
In order to support SPI and ELOG drivers the SMM region needs to be able to be larger than the previous allocation below 0x7400. Now that we have support for 4M TSEG we do not need to live in this region. This change adds a 16KB heap region abofe the save state area at TSEG+64KB and moves the C handler above this. The heap region is then available for malloc and the C handler can grow to support flash and event log features. While updating the memory map comment in assembly stub I also added a pause instruction to the cpu spin lock as this was added to the C code in latest upstream rebase. Dump sympbols from smm.elf binary to see the new regions: 00010000 B _heap 00014000 B _eheap 00014000 T _smm_c_handler_start 0001b240 T _smm_c_handler_end Change-Id: I45f0ab4df1fdef3b626f877094a58587476ac634 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1308 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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