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authorWonkyu Kim <wonkyu.kim@intel.com>2020-03-02 22:18:26 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-03-07 20:44:21 +0000
commit34944be317657e29a4bcba82f7f52f12ed90a327 (patch)
treebf250e99b60a99875c60c4edc5038a17d78ad041 /src/mainboard/Kconfig
parentdd3604422f5ca4672dc2919805a09c74e732066c (diff)
mb/intel/tglrvp: Update display ports for RVP
Enable DdiPortBHpd and additional pin muxes for DPs. These pin muxes were done in FSPs, these pin muxes are for bypassing pin muxes in FSPs. BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check FSP log or DP port pin mux from pinctl driver. Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: Id44cfba696b1a21296278f4de2ad6de8f6bbd63b Reviewed-on: https://review.coreboot.org/c/coreboot/+/39229 Reviewed-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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