summaryrefslogtreecommitdiff
path: root/src/lib
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2019-06-11 17:52:06 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-06-13 04:39:28 +0000
commit90f750bbf0309bdf038a5af9f85aba323251072d (patch)
tree769d0c9fca4aacedf4ae23c59e763cdde11c7dfc /src/lib
parent5e5167ed04082e0fe63db865382dc2021877ce3c (diff)
stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enable
This patch removes CONFIG_NO_STAGE_CACHE check from caller function and add empty inline function incase CONFIG_NO_STAGE_CACHE is enable. Change-Id: I8e10ef2d261f9b204cecbeae6f65fda037753534 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/prog_loaders.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index a21663fc0f..81ec2ec3c4 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -74,11 +74,6 @@ fail:
halt();
}
-void __weak stage_cache_add(int stage_id,
- const struct prog *stage) {}
-void __weak stage_cache_load_stage(int stage_id,
- struct prog *stage) {}
-
static void ramstage_cache_invalid(void)
{
printk(BIOS_ERR, "ramstage cache invalid.\n");
@@ -155,8 +150,7 @@ void run_ramstage(void)
} else if (load_nonrelocatable_ramstage(&ramstage))
goto fail;
- if (!CONFIG(NO_STAGE_CACHE))
- stage_cache_add(STAGE_RAMSTAGE, &ramstage);
+ stage_cache_add(STAGE_RAMSTAGE, &ramstage);
timestamp_add_now(TS_END_COPYRAM);