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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-25 22:58:23 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-26 00:46:35 +0200
commit3f8989ebbce4305541c6df569d283f76029ae724 (patch)
tree25252b3dc8c636a3af2264a414c6085e3471bf7e /src/lib/nrv2b.c
parent05e740fc40e409dcf8d592f4bbeaf87dc92140c5 (diff)
Revamp Intel microcode update code
- add GPLv2 + copyright header after talking to Ron - "bits" in struct microcode served no real purpose but getting its address taken. Hence drop it - use asm volatile instead of __asm__ volatile - drop superfluous wrmsr (that seems to be harmless but is still wrong) in read_microcode_rev - use u32 instead of unsigned int where appropriate - make code usable both in bootblock and in ramstage - drop ROMCC style print_debug statements - drop microcode update copy in Sandybridge bootblock Change-Id: Iec4d5c7bfac210194caf577e8d72446e6dfb4b86 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/928 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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