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author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-28 14:08:07 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-09 14:20:55 +0000 |
commit | 467eb569c05e67c7e723466fa7c8e46a2046c07a (patch) | |
tree | 252f42944ae0dab6925ca8cf3549827ca0c560c0 /src/lib/compute_ip_checksum.c | |
parent | 7bbde76014a571cbe2344615f19b1e9bc905b84a (diff) |
soc/amd/common/block/acpimmio: add remote GPIO bank ACPIMMIO region
Currently coreboot for the AMD SOCs only supports accessing the up to 4
main GPIO banks of up to 64 GPIOs each. Some AMD SoCs including Cezanne
have another GPIO bank in the ACPIMMIO region that can contain up to 48
GPIOs beginning with GPIO 256 which is called the remote GPIO bank. The
first 48 DWORDs of that ACPIMMIO bank are the 32 bit wide GPIO registers
and beginning at offset 0xc0 it has the corresponding 8 bit wide GPIO
MUX registers.
BUG=b:194524995
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ice4e3358de17ac2601621814978cdb70e6f2c926
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/lib/compute_ip_checksum.c')
0 files changed, 0 insertions, 0 deletions