summaryrefslogtreecommitdiff
path: root/src/lib/Kconfig.cbfs_verification
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@google.com>2020-11-17 10:13:05 -0800
committerDuncan Laurie <dlaurie@chromium.org>2020-12-10 18:13:12 +0000
commitbd8bb8eae0bdf4dec2b92a8be50c5286e34d7e0f (patch)
tree957ec77fdd1e483443451f6a82a5db27de298d99 /src/lib/Kconfig.cbfs_verification
parent7590c370d64ad5d088feee879c76a38a18621776 (diff)
drivers/genesyslogic/gl9755: Adjust L1 exit latency to enable ASPM
Configure the CFG2 register to set the latency to <64us in order to ensure the L1 exit latency is consistent across devices and that L1 ASPM is always enabled. This moves the setup code from device init to device enable so it executes before coreboot does ASPM configuration, and removes the call to pci_dev_init() as that is just for VGA Option ROMs. BUG=b:173207454 TEST=Verify the device and link capability and control for L1: DevCap: Latency L1 <64us LnkCap: Latency L1 <64us LnkCtl: ASPM L1 Enabled Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: Ie2b85a6697f164fbe4f84d8cd5acb2b5911ca7a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/lib/Kconfig.cbfs_verification')
0 files changed, 0 insertions, 0 deletions