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authorArthur Heymans <arthur@aheymans.xyz>2017-06-13 14:47:28 +0200
committerMartin Roth <martinroth@google.com>2017-06-16 16:03:34 +0200
commit9c27eda052fdf189288dc12223c0673109576725 (patch)
tree2bb5096247eb2177799dcbd9780a6fde62bb261b /src/include
parent432ac615d018465e9808be4286c0caf2ca192cf1 (diff)
soc/intel/braswell: Hide some Kconfig options in menuconfig
Don't allow the user to set PCIe configspace base address. Don't allow the user to set the DCACHE size and base. Change-Id: I7a42cc5f6098214364624bcfa3cbd93b4903ee84 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20181 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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