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authorCurtis Chen <curtis.chen@intel.com>2021-12-21 11:51:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-01-10 14:26:16 +0000
commit150fee60cc6f30fe3dddcf504958cd2b916f469b (patch)
tree7f1a227f32489e795ff6d975b7c9e61beebca136 /src/include
parent502a761221ed14c4b381fe33350c9f9d17ec0d76 (diff)
soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains
We support all the ADL-P 15W/28W/45W SKU's and map them with the latest VR configurations. These config values are generated by iPDG application with ADL-P platform package tool. RDC Kit ID for the iPDG tools * Intel(R) Platform Design Studio Installer: 610905 * Intel(R) Platform Design Studio - Libraries: 613643 * Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345 * Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261 BUG=b:211365920 TEST=Build and check fsp log to confirm the settings are set properly. Signed-off-by: Curtis Chen <curtis.chen@intel.com> Change-Id: Ida7a6df0422a9a3972646cb3bdd0112b5efa2755 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index b6cb7d8f32..cddadd6764 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4001,6 +4001,7 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_7 0x4601
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_8 0x4661
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_9 0x467f
+#define PCI_DEVICE_ID_INTEL_ADL_P_ID_10 0x4619
#define PCI_DEVICE_ID_INTEL_ADL_M_ID_1 0x4602
#define PCI_DEVICE_ID_INTEL_ADL_M_ID_2 0x460a
#define PCI_DEVICE_ID_INTEL_ADL_N_ID_1 0x4617