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authorCaveh Jalali <caveh@chromium.org>2022-08-31 16:53:59 -0700
committerMartin L Roth <gaumless@gmail.com>2022-09-07 22:19:21 +0000
commitc762e231da33aeb4fbd53b15e429121d498f7b2a (patch)
treef2029d13edf110ab3fb60922cb595c8b3ff60c24 /src/include
parent9f1588c26d3cc7760c18062d587823750c3271b9 (diff)
util/spd_tools: Update LP5X support for ADL/RPL/MTL
This updates the SPD utility and generated SPDs for LP5X to use memory type code 0x15 (LPDDR5X) instead of 0x13 (LPDDR5). This is done based on Intel Tech Advisory Doc ID #616599 dated May 2022, page 15. SPDs were regenerated with: "util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5" This only affects the SPDs for 2 memory parts for Intel SoCs and the only board referencing these is rex. BUG=b:242765117 TEST=inspected SPD hex dump Change-Id: Iadb4688f1cb4265dab1dc7c242f0c301d5498b83 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67265 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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