soc/intel/meteorlake: Update tcss_usb3 alias

TCSS and TBT use the same lane on schematic. Update the port start
from 0 to match the Intel schematic. You can better follow the it
without convert the port number.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ic6631dcbbd9f6c79c756b015425e2da778eb395e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>

0 files changed, 0 insertions, 0 deletions