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authorMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-09-03 14:44:44 -0500
committerMartin L Roth <gaumless@gmail.com>2023-09-05 14:39:27 +0000
commitf8beac6b7ada62e9ad8e5dc2eabd381071a8482e (patch)
tree3c3185f5623f43a8e3f5430bb4fcffb402fcf386 /src/include/uuid.h
parent6b69af8f774bb4131b61227cdb0bc30ff9025e01 (diff)
soc/amd/common/vboot: Drop reporting of Silicon level
Per the PSP team, this field in the transfer buffer isn't used anymore and always set to zero, causing devices to incorrectly report having pre-production silicon. Change-Id: Ida4bf4b9328ac83d905e4c3f822e6ceabe9be79d Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77630 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/include/uuid.h')
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