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| author | Deepti Deshatty <deepti.deshatty@intel.com> | 2021-04-29 21:32:58 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-14 05:55:30 +0000 |
| commit | 193203f90b49de06e4997aad53fb6d556c34798f (patch) | |
| tree | 354bee59790a12266bbeee14f944369d34cc4b78 /src/include/fit.h | |
| parent | b035f589401b0060771be432851c339843fffeca (diff) | |
mb/intel/adlrvp: Add board id for MR DDR5 SKU
Add support for Maple Ridge DDR5 SKU with boardid 0x16
TEST=Verified build for ADL-P Chrome RVP
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.com>
Change-Id: I9f0e9072f5866b60fb8463bb90f61915c78568db
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.corp-partner.google.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Diffstat (limited to 'src/include/fit.h')
0 files changed, 0 insertions, 0 deletions