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authorVadim Bendebury <vbendeb@chromium.org>2019-11-26 14:08:59 -0800
committerVadim Bendebury <vbendeb@chromium.org>2019-11-27 17:29:31 +0000
commitc7fc199f40339344903c51ff51bbf8610f218b86 (patch)
tree1a2bbe93b7d0825aca3c0f4d9f0cdd74024cf6cf /src/include/device/pci_def.h
parent12294d0c48bd5a916e192ca663ffa49a346b420f (diff)
cr50 i2c: add error message reporting TPM IRQ timeout
Various recent x86 SOCs have trouble registering short pulses generated by the H1 to indicate that it is ready for the next transaction. This patch adds an error message to report this condition, which would greatly reduce the amount of guesswork when troubleshooting new platforms. BUG=b:144002424 TEST=tried this code on the Drallion device exhibiting the problem, observed error messages in the coreboot log; $ grep IRQ ap.log Cr50 i2c TPM IRQ timeout! Cr50 i2c TPM IRQ timeout! Cr50 i2c TPM IRQ timeout! Cr50 i2c TPM IRQ timeout! ... Change-Id: I5f6ee3986bed58e12fd0ec8cecbf35f46c9263c2 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org>
Diffstat (limited to 'src/include/device/pci_def.h')
0 files changed, 0 insertions, 0 deletions