diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-14 17:59:47 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-16 14:10:07 +0000 |
| commit | f1e8e7f1483967a08e46a14fc8e80f04415b1a27 (patch) | |
| tree | 36802f8fc287430277e656c8286c3557daed42b5 /src/include/cpu | |
| parent | 1ce645347caa13f568d67a203dbba6cfaffbd2a1 (diff) | |
include/cpu/amd/msr: don't redefine the IA32_BIOS_SIGN_ID MSR
Change-Id: Iff19ae495fb9c0795dae4b2844dc8e0220a57b2c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/amd/msr.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h index 55a7841e7e..37372d1662 100644 --- a/src/include/cpu/amd/msr.h +++ b/src/include/cpu/amd/msr.h @@ -80,7 +80,6 @@ #define S3_RESUME_EIP_MSR 0xC00110E0 #define PSP_ADDR_MSR 0xc00110a2 -#define MSR_PATCH_LEVEL 0x0000008B #define CORE_PERF_BOOST_CTRL 0x15c #endif /* CPU_AMD_MSR_H */ |