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author | Pratik Prajapati <pratikkumar.v.prajapati@intel.com> | 2017-08-29 14:27:07 -0700 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2017-09-27 06:58:32 +0000 |
commit | dc194e2bc4e7421d760693702775b39784522bb3 (patch) | |
tree | 9d287958a0bef0ec281733d496222c314c98c2e4 /src/ec/google/chromeec/vboot_storage.c | |
parent | 4bc6edf90956a9971aedb187e570d5c0f58d70cd (diff) |
soc/intel/apollolake: Add SGX support
- Call into commmon SGX code to configure core PRMRR and follow
other SGX init seqeuence.
- Enable SOC_INTEL_COMMON_BLOCK_SGX for both GLK
- Enable SOC_INTEL_COMMON_BLOCK_CPU_MPINIT for GLK, as MP init needs
to be completed before calling into fsp-s for SGX.
Change-Id: I9331cf5b2cbc86431e2749b84a55f77f7f3c5960
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/21276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/ec/google/chromeec/vboot_storage.c')
0 files changed, 0 insertions, 0 deletions