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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-18 19:03:29 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-20 21:21:36 +0100
commitc13d65c29b6219d4b765f40e661548eb389524b5 (patch)
tree097ad2b0071faf8522cb4d35d6a453d6bca1f18d /src/ec/compal
parent51e238d3b4ace91bab9b6ae2a1c69409a0144205 (diff)
intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT
Compiled romstage is over 64kiB and exceeded XIP_ROM_SIZE, so it was not entirely set WRPROT cacheable. Reduces first boot raminit (including training) time by 400ms. Change-Id: I5c4cbf581fc845150f207087c1527338ca364f60 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17488 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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