diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-07-15 10:25:48 -0500 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-05 17:33:11 +0100 |
commit | 30cda7e83f06f5a84eb9dfea3be9f435bb36d392 (patch) | |
tree | 6162c2ae5b464050e10ccc8addf41d31e24fb0fd /src/ec/acpi | |
parent | 072e0cc899aa11ca55fecd9e8a384a045975f735 (diff) |
arm64: provide early SoC initialization
Some of the SoC's need an early hook to configure
certain registers. One example of this is on t132
where ramstage is the first thing being ran on the
arm64 core and it is the only entity that can configure
certain registers required for the rest of ramstage.
Therefore, provide the opportunity for the SoC to
implement such requirements.
BUG=chrome-os-partner:30572
BRANCH=None
TEST=Built and ran through coreboot.
Original-Change-Id: Ib352f3788872f888581b398c9b394b7c4e54b02a
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/208061
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 2c50e2b39e75d1383e8e573c576630a5b7313349)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I38df63e46c5c21b2d319fc9eb42053c3a0d61bc8
Reviewed-on: http://review.coreboot.org/8595
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/ec/acpi')
0 files changed, 0 insertions, 0 deletions