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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-05-08 21:31:44 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-05-18 07:10:13 +0000
commite8d1bef8cbd78c00065381848030655d34d0ecd3 (patch)
tree7bea607316e936a8f7370b32689d35ea3c0f0e08 /src/drivers/spi/spi_flash.c
parent4fafd412090d7de9a2ec6232ed22bbb1b1ce5dde (diff)
jasperlake: update processor power limits configuration
Update processor power limit configuration parameters based on common code base support for Intel Jasperlake SoC based platforms. BRANCH=None BUG=None TEST=Built for jasperlake system Change-Id: I9b725d041dcb8847f83ec103e58b9571b4c596ac Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/drivers/spi/spi_flash.c')
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