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authorJeremy Compostella <jeremy.compostella@intel.com>2023-05-19 10:04:47 -0700
committerFelix Held <felix-coreboot@felixheld.de>2023-05-25 21:19:53 +0000
commit246b943056a9c91bd6eac9412d460122c34c6b4a (patch)
tree98c2d659f09271971d43d82797b64fc26459363d /src/drivers/soundwire/max98363/chip.h
parentaec951eb3af961953f9e8152fd05f32e11b11f36 (diff)
soc/intel/mtl/acpi/xhci: Add clock gating support
Implement PS0 and PS3 methods to support xHCI clock gating in S0ix suspend and resume. BUG=b:283989367 TEST=S0iX test passed Change-Id: Ia5b72b81fd1c0d0b7b90f8d9cbf6ef4aa9da9743 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75401 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/drivers/soundwire/max98363/chip.h')
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