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authorNikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>2020-09-02 17:51:09 -0500
committerAaron Durbin <adurbin@chromium.org>2020-09-11 15:32:14 +0000
commit1e633e88dd69a13361c2d256ce7c5e63e84415b6 (patch)
tree30d7ef4879690ae8b7caa7a4ef6ce66ca1061fc6 /src/drivers/genesyslogic
parent1fa45b1460d9922a38fd995b8d48bf84fc5c7975 (diff)
soc/amd/picasso: Fix TSC frequency calculation
Fix TSC frequency calculation per Picasso PPR. This code was copied from Stoney and was incorrect for Picasso. BUG=b:163423984 TEST=verify Dalboz TSC to be 1GHz BRANCH=zork Change-Id: Ibe3f49c7d295e7336ee042da2b94823171b6eb55 Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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