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author | Felix Held <felix-coreboot@felixheld.de> | 2022-02-02 22:55:34 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-04 14:02:27 +0000 |
commit | 3bdbdb77a2ab8904487266b26a33b18c7d85e28b (patch) | |
tree | 95074dfebbd676215f0894bd2466cec11a1c0ded /src/device | |
parent | 6d1db72958cf8b4fc351c983f5dd1f5068a49974 (diff) |
soc/amd/common/block/i2c/i23c_pad_ctr: add & use I23C pad configuration
I2C bus 0..2 on Sabrina uses a different pad type which supports 1.1V
and 1.8V levels, but doesn't support 3.3V I2C levels. Compared to the
existing I2C pad control registers the bit definitions are different, so
add a separate function to configure those pads which however still has
the same function signature and is compatible with same data structs
used for the devicetree settings. PPR #57243 Rev 1.50 was used as a
reference.
TEST=None
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie210c3437f2608d1e9fb99dcb151fc4190721375
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/device')
0 files changed, 0 insertions, 0 deletions