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authorSubrata Banik <subratabanik@google.com>2022-12-11 15:01:41 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-12-19 14:12:59 +0000
commitb9d53a0c8c5a1285285856e61b486f5e8ea7df07 (patch)
tree437153ad56dfd9aefb114cac728af9c6c3486ca3 /src/device/pciexp_device.c
parent836881935fe8c3679f11008553f562b9f620f94e (diff)
drivers/intel/fsp2_0: Implement `mps2_noop_get_number_of_processors()`
This patch implements mps2_noop_get_number_of_processors() API with minimal information required for Intel MTL FSP to utilise the `MP_SERVICES_PPI_V2_NOOP` config. The major difference between Intel ADL and MTL FSP in terms of doing CPU feature programming aka utilizing MP PPI wrapper code is that, starting with MTL, FSP has dropped the `SkipMpInit` UPD. It means now, coreboot doesn't have any way to skip FSP doing MP Init operation. But during ADL, coreboot had introduced the MP_SERVICES_PPI_V2_NOOP config that is used to skip FSP about actually running any CPU feature programming on APs. The idea is to use the same config even in MTL to provide only the must have information (to bypass any assert in FSP during debug image) to FSP. Passing `FSP_UNSUPPORTED` from mps2_noop_get_number_of_processors() results in `assert` while compiling FSP in debug mode hence, implementing the function to pass only the information about BSP being the active processor along with passing `FSP_SUCCESS` (eventually it makes FSP happy and doesn't run into any issue in debug and/or release mode). TEST=Able to build and boot Google/Rex and Google/Kano while coreboot skip calling into FSP for doing MP init. Change-Id: I75d7e151699782210e86be564b0055d572cacc3f Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70555 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/device/pciexp_device.c')
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