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| author | Aaron Durbin <adurbin@chromium.org> | 2020-06-12 16:44:50 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-14 16:51:01 +0000 |
| commit | 4a3a73c0425e90a6cffd99d4b06766eff25d171f (patch) | |
| tree | 78256e0126ba6ec6c13abe2d8e691cf66b6af16b /src/device/pci_rom.c | |
| parent | 1e53a89f632e5384c8254f0916405d9cd19396d6 (diff) | |
soc/amd/picasso: correct MCFG ACPI table
The start and end bus number in the MCFG ACPI table is inclusive.
Therefore, the number of buses decoded needs to be subtracted by
1.
BUG=b:158874061
Change-Id: Ic773bc1e0ccaa99af45d1a53919f6480887fa37e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42329
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_rom.c')
0 files changed, 0 insertions, 0 deletions