diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2012-11-30 12:34:04 -0800 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-11-30 23:59:58 +0100 |
commit | 8d7115560d469f901d7d8ccb242d0b437e7394aa (patch) | |
tree | 0f1b4bd63c48a233c49d5a9ca15f08a1675d1ff4 /src/device/Kconfig | |
parent | 4b6be985aae8bff84ae442e7be7669e93694fa1e (diff) |
Rename devices -> device
to match src/include/device
Change-Id: I5d0e5b4361c34881a3b81347aac48738cb5b9af0
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1960
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/device/Kconfig')
-rw-r--r-- | src/device/Kconfig | 449 |
1 files changed, 449 insertions, 0 deletions
diff --git a/src/device/Kconfig b/src/device/Kconfig new file mode 100644 index 0000000000..700516b902 --- /dev/null +++ b/src/device/Kconfig @@ -0,0 +1,449 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007-2010 coresystems GmbH +## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +menu "Devices" +# TODO: Explain differences (if any) for onboard cards. +config VGA_ROM_RUN + bool "Run VGA Option ROMs" + default n if PAYLOAD_SEABIOS + default y if !PAYLOAD_SEABIOS + depends on !PAYLOAD_SEABIOS || EXPERT + help + Execute VGA Option ROMs in coreboot if found. This is required + to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS + payload. + + When using a SeaBIOS payload it runs all option ROMs with much + more complete BIOS interrupt services available than coreboot, + which some option ROMs require in order to function correctly. + + If unsure, say N when using SeaBIOS as payload, Y otherwise. + +config S3_VGA_ROM_RUN + bool "Re-run VGA Option ROMs on S3 resume" + default y + depends on VGA_ROM_RUN && HAVE_ACPI_RESUME + help + Execute VGA Option ROMs in coreboot when resuming from S3 suspend. + + When using a SeaBIOS payload it runs all option ROMs with much + more complete BIOS interrupt services available than coreboot, + which some option ROMs require in order to function correctly. + + If unsure, say N when using SeaBIOS as payload, Y otherwise. + +config PCI_ROM_RUN + bool "Run non-VGA Option ROMs" + default n if PAYLOAD_SEABIOS + default y if !PAYLOAD_SEABIOS + depends on !PAYLOAD_SEABIOS || EXPERT + help + Execute non-VGA PCI Option ROMs in coreboot if found. + + Examples include IDE/SATA controller Option ROMs and Option ROMs + for network cards (NICs). + + When using a SeaBIOS payload it runs all option ROMs with much + more complete BIOS interrupt services available than coreboot, + which some option ROMs require in order to function correctly. + + If unsure, say N when using SeaBIOS as payload, Y otherwise. + +config ON_DEVICE_ROM_RUN + bool "Run Option ROMs on PCI devices" + default n if PAYLOAD_SEABIOS + default y if !PAYLOAD_SEABIOS + depends on !PAYLOAD_SEABIOS || EXPERT + help + Execute Option ROMs stored on PCI/PCIe/AGP devices in coreboot. + + If disabled, only Option ROMs stored in CBFS will be executed by + coreboot. If you are concerned about security, you might want to + disable this option, but it might leave your system in a state of + degraded functionality. + + When using a SeaBIOS payload it runs all option ROMs with much + more complete BIOS interrupt services available than coreboot, + which some option ROMs require in order to function correctly. + + If unsure, say N when using SeaBIOS as payload, Y otherwise. + +choice + prompt "Option ROM execution type" + default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 + default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 + depends on PCI_ROM_RUN || VGA_ROM_RUN || GEODE_VSA + +config PCI_OPTION_ROM_RUN_REALMODE + prompt "Native mode" + bool + depends on ARCH_X86 + help + If you select this option, PCI Option ROMs will be executed + natively on the CPU in real mode. No CPU emulation is involved, + so this is the fastest, but also the least secure option. + (only works on x86/x64 systems) + +config PCI_OPTION_ROM_RUN_YABEL + prompt "Secure mode" + bool + depends on !GEODE_VSA + help + If you select this option, the x86emu CPU emulator will be used to + execute PCI Option ROMs. + + This option prevents Option ROMs from doing dirty tricks with the + system (such as installing SMM modules or hypervisors), but it is + also significantly slower than the native Option ROM initialization + method. + + This is the default choice for non-x86 systems. + +endchoice + +config YABEL_PCI_ACCESS_OTHER_DEVICES + prompt "Allow Option ROMs to access other devices" + bool + depends on PCI_OPTION_ROM_RUN_YABEL + help + Per default, YABEL only allows Option ROMs to access the PCI device + that they are associated with. However, this causes trouble for some + onboard graphics chips whose Option ROM needs to reconfigure the + north bridge. + +config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG + prompt "Fake success on writing other device's config space" + bool + depends on YABEL_PCI_ACCESS_OTHER_DEVICES + help + By default, YABEL aborts when the Option ROM tries to write to other + devices' config spaces. With this option enabled, the write doesn't + follow through, but the Option ROM is allowed to go on. + This can create issues such as hanging Option ROMs (if it depends on + that other register changing to the written value), so test for + impact before using this option. + +config YABEL_VIRTMEM_LOCATION + prompt "Location of YABEL's virtual memory" + hex + depends on PCI_OPTION_ROM_RUN_YABEL && EXPERT + default 0x1000000 + help + YABEL requires 1MB memory for its CPU emulation. This memory is + normally located at 16MB. + +config YABEL_VIRTMEM_LOCATION + hex + depends on PCI_OPTION_ROM_RUN_YABEL && !EXPERT + default 0x1000000 + +config YABEL_DIRECTHW + prompt "Direct hardware access" + bool + depends on PCI_OPTION_ROM_RUN_YABEL + help + YABEL consists of two parts: It uses x86emu for the CPU emulation and + additionally provides a PC system emulation that filters bad device + and memory access (such as PCI config space access to other devices + than the initialized one). + + When choosing this option, x86emu will pass through all hardware + accesses to memory and I/O devices to the underlying memory and I/O + addresses. While this option prevents Option ROMs from doing dirty + tricks with the CPU (such as installing SMM modules or hypervisors), + they can still access all devices in the system. + Enable this option for a good compromise between security and speed. + +config MULTIPLE_VGA_ADAPTERS + bool + default n + +config PCI + bool + default n + +config PCI_64BIT_PREF_MEM + bool + depends on PCI + default n + +config HYPERTRANSPORT_PLUGIN_SUPPORT + bool + depends on PCI + default n + +config PCIX_PLUGIN_SUPPORT + bool + depends on PCI + default y + +config PCIEXP_PLUGIN_SUPPORT + bool + depends on PCI + default y + +config AGP_PLUGIN_SUPPORT + bool + depends on PCI + default y + +config CARDBUS_PLUGIN_SUPPORT + bool + depends on PCI + default y + +config PCIEXP_COMMON_CLOCK + prompt "Enable PCIe Common Clock" + bool + default n + help + Detect and enable Common Clock on PCIe links. + +config PCIEXP_ASPM + prompt "Enable PCIe ASPM" + bool + default n + help + Detect and enable ASPM on PCIe links. + +config PCI_BUS_SEGN_BITS + int + default 0 +endmenu + +menu "VGA BIOS" + +config VGA_BIOS + bool "Add a VGA BIOS image" + help + Select this option if you have a VGA BIOS image that you would + like to add to your ROM. + + You will be able to specify the location and file name of the + image later. + +config VGA_BIOS_FILE + string "VGA BIOS path and filename" + depends on VGA_BIOS + default "vgabios.bin" + help + The path and filename of the file to use as VGA BIOS. + +config VGA_BIOS_ID + string "VGA device PCI IDs" + depends on VGA_BIOS + default "1106,3230" + help + The comma-separated PCI vendor and device ID that would associate + your VGA BIOS to your video card. + + Example: 1106,3230 + + In the above example 1106 is the PCI vendor ID (in hex, but without + the "0x" prefix) and 3230 specifies the PCI device ID of the + video card (also in hex, without "0x" prefix). + +config INTEL_MBI + bool "Add an MBI image" + depends on NORTHBRIDGE_INTEL_I82830 + help + Select this option if you have an Intel MBI image that you would + like to add to your ROM. + + You will be able to specify the location and file name of the + image later. + +config MBI_FILE + string "Intel MBI path and filename" + depends on INTEL_MBI + default "mbi.bin" + help + The path and filename of the file to use as VGA BIOS. + +endmenu + +menu "Display" + depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE + +config FRAMEBUFFER_SET_VESA_MODE + prompt "Set VESA framebuffer mode" + bool + depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE + help + Set VESA framebuffer mode (needed for bootsplash) + +choice + prompt "VESA framebuffer video mode" + default FRAMEBUFFER_VESA_MODE_117 + depends on FRAMEBUFFER_SET_VESA_MODE + help + This option sets the resolution used for the coreboot framebuffer (and + bootsplash screen). + +config FRAMEBUFFER_VESA_MODE_100 + bool "640x400 256-color" + +config FRAMEBUFFER_VESA_MODE_101 + bool "640x480 256-color" + +config FRAMEBUFFER_VESA_MODE_102 + bool "800x600 16-color" + +config FRAMEBUFFER_VESA_MODE_103 + bool "800x600 256-color" + +config FRAMEBUFFER_VESA_MODE_104 + bool "1024x768 16-color" + +config FRAMEBUFFER_VESA_MODE_105 + bool "1024x7686 256-color" + +config FRAMEBUFFER_VESA_MODE_106 + bool "1280x1024 16-color" + +config FRAMEBUFFER_VESA_MODE_107 + bool "1280x1024 256-color" + +config FRAMEBUFFER_VESA_MODE_108 + bool "80x60 text" + +config FRAMEBUFFER_VESA_MODE_109 + bool "132x25 text" + +config FRAMEBUFFER_VESA_MODE_10A + bool "132x43 text" + +config FRAMEBUFFER_VESA_MODE_10B + bool "132x50 text" + +config FRAMEBUFFER_VESA_MODE_10C + bool "132x60 text" + +config FRAMEBUFFER_VESA_MODE_10D + bool "320x200 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_10E + bool "320x200 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_10F + bool "320x200 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_110 + bool "640x480 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_111 + bool "640x480 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_112 + bool "640x480 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_113 + bool "800x600 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_114 + bool "800x600 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_115 + bool "800x600 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_116 + bool "1024x768 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_117 + bool "1024x768 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_118 + bool "1024x768 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_119 + bool "1280x1024 32k-color (1:5:5:5)" + +config FRAMEBUFFER_VESA_MODE_11A + bool "1280x1024 64k-color (5:6:5)" + +config FRAMEBUFFER_VESA_MODE_11B + bool "1280x1024 16.8M-color (8:8:8)" + +config FRAMEBUFFER_VESA_MODE_USER + bool "Manually select VESA mode" + +endchoice + +# Map the config names to an integer (KB). +config FRAMEBUFFER_VESA_MODE + prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER + hex + default 0x100 if FRAMEBUFFER_VESA_MODE_100 + default 0x101 if FRAMEBUFFER_VESA_MODE_101 + default 0x102 if FRAMEBUFFER_VESA_MODE_102 + default 0x103 if FRAMEBUFFER_VESA_MODE_103 + default 0x104 if FRAMEBUFFER_VESA_MODE_104 + default 0x105 if FRAMEBUFFER_VESA_MODE_105 + default 0x106 if FRAMEBUFFER_VESA_MODE_106 + default 0x107 if FRAMEBUFFER_VESA_MODE_107 + default 0x108 if FRAMEBUFFER_VESA_MODE_108 + default 0x109 if FRAMEBUFFER_VESA_MODE_109 + default 0x10A if FRAMEBUFFER_VESA_MODE_10A + default 0x10B if FRAMEBUFFER_VESA_MODE_10B + default 0x10C if FRAMEBUFFER_VESA_MODE_10C + default 0x10D if FRAMEBUFFER_VESA_MODE_10D + default 0x10E if FRAMEBUFFER_VESA_MODE_10E + default 0x10F if FRAMEBUFFER_VESA_MODE_10F + default 0x110 if FRAMEBUFFER_VESA_MODE_110 + default 0x111 if FRAMEBUFFER_VESA_MODE_111 + default 0x112 if FRAMEBUFFER_VESA_MODE_112 + default 0x113 if FRAMEBUFFER_VESA_MODE_113 + default 0x114 if FRAMEBUFFER_VESA_MODE_114 + default 0x115 if FRAMEBUFFER_VESA_MODE_115 + default 0x116 if FRAMEBUFFER_VESA_MODE_116 + default 0x117 if FRAMEBUFFER_VESA_MODE_117 + default 0x118 if FRAMEBUFFER_VESA_MODE_118 + default 0x119 if FRAMEBUFFER_VESA_MODE_119 + default 0x11A if FRAMEBUFFER_VESA_MODE_11A + default 0x11B if FRAMEBUFFER_VESA_MODE_11B + default 0x117 if FRAMEBUFFER_VESA_MODE_USER + +config FRAMEBUFFER_KEEP_VESA_MODE + prompt "Keep VESA framebuffer" + bool + depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE + help + This option keeps the framebuffer mode set after coreboot finishes + execution. If this option is enabled, coreboot will pass a + framebuffer entry in its coreboot table and the payload will need a + framebuffer driver. If this option is disabled, coreboot will switch + back to text mode before handing control to a payload. + +config BOOTSPLASH + prompt "Show graphical bootsplash" + bool + depends on FRAMEBUFFER_SET_VESA_MODE + help + This option shows a graphical bootsplash screen. The grapics are + loaded from the CBFS file bootsplash.jpg. + +config BOOTSPLASH_FILE + string "Bootsplash path and filename" + depends on BOOTSPLASH + default "bootsplash.jpg" + help + The path and filename of the file to use as graphical bootsplash + screen. The file format has to be jpg. +endmenu |