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authorPatrick Rudolph <patrick.rudolph@9elements.com>2021-06-11 21:24:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-06-15 07:47:35 +0000
commitd023909b0112889941c1470cd125b1903572ba3b (patch)
tree4c92322f65ca5e672e3af98f9804d4f9d65d6c91 /src/cpu/x86
parent6ccb252918c8a076dcf0a122e3aac028b4e80d4e (diff)
treewide: Disable R_AMD64_32S relocation support
This fixes a hard to debug hang that could occur in any stage, but in the end it follows simple rules and is easy to fix. In long mode the 32bit displacement addressing used on 'mov' and 'lea' instructions is sign-extended. Those instructions can be found using readelf on the stage and searching for relocation type R_X86_64_32S. The sign extension is no issue when either running in protected mode or the code module and thus the address is below 2GiB. If the address is greater than 2GiB, as usually the case for code in TSEG, the higher address bits [64:32] are all set to 1 and the effective address is pointing to memory not paged. Accessing this memory will cause a page fault, which isn't handled either. To prevent such problems - disable R_AMD64_32S relocations in rmodtool - add comment explaining why it's not allowed - use the pseudo op movabs, which doesn't use 32bit displacement addressing - Print a useful error message if such a reloc is present in the code Fixes a crash in TSEG and when in long mode seen on Intel Sandybridge. Change-Id: Ia5f5a9cde7c325f67b12e3a8e9a76283cc3870a3 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55448 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/x86')
-rw-r--r--src/cpu/x86/lapic/secondary.S6
-rw-r--r--src/cpu/x86/sipi_vector.S2
-rw-r--r--src/cpu/x86/smm/smm_stub.S2
3 files changed, 6 insertions, 4 deletions
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 073e6b485b..d36bc9a645 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -61,9 +61,11 @@ __ap_protected_start:
#if ENV_X86_64
/* entry64.inc preserves ebx. */
#include <cpu/x86/64bit/entry64.inc>
- mov secondary_stack, %rsp
+ movabs secondary_stack, %rax
+ mov %rax, %rsp
andl $0xfffffff0, %esp
- mov secondary_cpu_index, %rdi
+ movabs secondary_cpu_index, %rax
+ mov %rax, %rdi
#else
/* Set the stack pointer, and flag that we are done */
xorl %eax, %eax
diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S
index f9b29576bd..d8156b88a8 100644
--- a/src/cpu/x86/sipi_vector.S
+++ b/src/cpu/x86/sipi_vector.S
@@ -220,7 +220,7 @@ load_msr:
mov %rsi, %rdi /* cpu_num */
- movl c_handler, %eax
+ movabs c_handler, %eax
call *%rax
#else
/* c_handler(cpu_num), preserve proper stack alignment */
diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S
index 0c690da986..07be047a36 100644
--- a/src/cpu/x86/smm/smm_stub.S
+++ b/src/cpu/x86/smm/smm_stub.S
@@ -210,7 +210,7 @@ apicid_end:
mov %rsp, %rdi /* *arg */
- movl c_handler, %eax
+ movabs c_handler, %eax
call *%rax
/*