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| author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2022-05-24 18:37:24 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-06-03 15:23:22 +0000 |
| commit | 322aa801d2a95fd5cb2d7f2fc7b871c91ef180a9 (patch) | |
| tree | 68204948f6f649e9ab20cc783c6a7d7820567dd8 /src/cpu/x86 | |
| parent | 954af5293f3d72e8f389dff6f2a742f9fbdf56d7 (diff) | |
mb/google/nissa/craask: Configure the external V1p05/Vnn/VnnSx
This patch configures external V1p05/Vnn/VnnSx rails for Craask
to achieve the better power savings.
* Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3,
S4, S5 , S0 states.
* Set the supported voltage states.
* Set the voltage for v1p05 and vnn.
* Set the ICC max for v1p05 and vnn.
BUG=b:233717182
TEST=emerge-nissa coreboot
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: I95d24c0836f3ee02006868341ccc72d762c155d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/cpu/x86')
0 files changed, 0 insertions, 0 deletions