diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-05-07 07:46:17 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-08 15:21:24 +0000 |
| commit | 3a7346c729f3da5ebd58dd55445a7729e891020b (patch) | |
| tree | c5b860e3f8e662ee9da05816d32766e7287d0e96 /src/cpu/x86/mtrr | |
| parent | 16bc46c7adb23fd0cec8eadc014bb1b0adbd7916 (diff) | |
cpu/x86/mtrr: Replace GPLv2 long form headers with SPDX header
Change-Id: I9d97cac214f04604f956cd9eee1e281b75c93645
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/x86/mtrr')
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 2698708516..53b640088b 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -1,15 +1,7 @@ /* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * * mtrr.c: setting MTRR to decent values for cache initialization on P6 * Derived from intel_set_mtrr in intel_subr.c and mtrr.c in linux kernel * |