diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2022-03-09 20:35:32 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-25 13:55:59 +0000 |
| commit | 0aa1ac41c33e6cd53c42c6b697b676c0f3ced3eb (patch) | |
| tree | 33536e8ebcad80d634cd8404342d2a811a3c65f2 /src/cpu/x86/64bit | |
| parent | 574f3c8fe44593c9bba8e283f1e1f0b0cebea980 (diff) | |
soc/intel/common: Add support to control CSE firmware update
The patch adds support to control CSE Lite firmware update dynamically.
In order to disable the CSE firmware update functionality, offset 0xf00
in the coreboot binary be updated with 0x1.
Run below command on the binary to disable CSE firmwar update
printf '\x01' | dd of=image-brya4es.serial.bin bs=1 seek=3840 count=1
conv=notrunc
BUG=b:153410586
TEST=Verified CSE firmware update functionality is not getting
triggered after updating the offset:0xF00 in the coreboot binary.
........................ CB Logs ......................................
[DEBUG] prev_sleep_state 5
[DEBUG] cse_lite: Number of partitions = 3
[DEBUG] cse_lite: Current partition = RW
[DEBUG] cse_lite: Next partition = RW
[DEBUG] cse_lite: Flags = 0x3
[DEBUG] cse_lite: RO version = 16.0.15.1752 (Status=0x0, Start=0x2000,
End=0x19bfff)
[DEBUG] cse_lite: RW version = 16.0.15.1752 (Status=0x0,
Start=0x205000, End=0x439fff)
rt_debug: pre_mem_debug.cse_fw_update_disable=1
[DEBUG] Boot Count incremented to 956
.......................................................................
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I9f234b142191eb83137d5d83f21e890e1cb828ba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62715
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/cpu/x86/64bit')
0 files changed, 0 insertions, 0 deletions