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authorSubrata Banik <subratabanik@google.com>2024-06-17 12:55:21 +0530
committerSubrata Banik <subratabanik@google.com>2024-06-18 08:25:24 +0000
commit3d523c4cd84bcf85b4908e8df7ce2b26332be88f (patch)
treef51473e4d6a9f886cc3d5ea99eaa8bfee2ce4b19 /src/cpu/x86/64bit/pt.S
parent04fd591b082214618875054bbb3a0c9775f8cf75 (diff)
cpu/x86: Rename paging structure variables for clarity
The following variables have been renamed: * PDPE_table -> PDPT (Page Directory Pointer Table) * PDE_tables -> PDT (Page Directory Table) This change improves the consistency and clarity of the code as per AMD Architecture Programmer's Manual document. PML4 -> PDPT -> PDT -> 2MB Physical Page TEST=Able to build and boot google/rex64. Change-Id: Ib57d1d54c2c1f4fcce2315b508ed7643251a20c5 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/cpu/x86/64bit/pt.S')
-rw-r--r--src/cpu/x86/64bit/pt.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/x86/64bit/pt.S b/src/cpu/x86/64bit/pt.S
index 67e4b1b8bf..4b2f3c8163 100644
--- a/src/cpu/x86/64bit/pt.S
+++ b/src/cpu/x86/64bit/pt.S
@@ -20,16 +20,16 @@
.global PM4LE
.align 4096
PM4LE:
-.quad _GEN_DIR(PDPE_table)
+.quad _GEN_DIR(PDPT)
.align 4096
-PDE_tables: /* identity map 2MiB pages */
+PDT: /* identity map 2MiB pages */
.rept 2048
-.quad _GEN_PAGE(0x200000 * ((. - PDE_tables) >> 3))
+.quad _GEN_PAGE(0x200000 * ((. - PDT) >> 3))
.endr
.align 4096
-PDPE_table: /* Point to PDE */
+PDPT: /* Point to PDT */
.rept 4
-.quad _GEN_DIR(PDE_tables + 4096 * ((. - PDPE_table) >> 3))
+.quad _GEN_DIR(PDT + 4096 * ((. - PDPT) >> 3))
.endr