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| author | John Zhao <john.zhao@intel.com> | 2020-05-19 20:21:00 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-26 15:07:21 +0000 |
| commit | 3c8cb24fc32d0322da5cfd7fabae3b66ac16470b (patch) | |
| tree | 76344fe3d349609ae54f3e435eddc1f96a414926 /src/cpu/ti | |
| parent | 8aac881fe8caacd264fe6e0951750c6357bb3b5c (diff) | |
mb/intel/tglrvp: Enable D3HotEnable and D3ColdEnable for tglrvp
This explicitly enables both of TCSS D3HotEnable and D3ColdEnable
from tglrvp devicetree.cb setting.
BUG=:b:146624360
TEST=Built and booted on tglrvp.
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I3b77fe15bd67e513f193f704030a98241e058437
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/cpu/ti')
0 files changed, 0 insertions, 0 deletions