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author | Martin Roth <martin.roth@se-eng.com> | 2013-07-08 16:23:54 -0600 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-11 22:36:59 +0200 |
commit | 4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c (patch) | |
tree | 6bd8440a05f6ea1184c0a5500d43cc92ab683f01 /src/cpu/samsung/exynos5250/cpu.c | |
parent | 0cb07e3476d9408d0935253f9f26c0a8ddc28401 (diff) |
cpu: Fix spelling
Change-Id: I69c46648de0689e9bed84c7726906024ad65e769
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/3729
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/samsung/exynos5250/cpu.c')
-rw-r--r-- | src/cpu/samsung/exynos5250/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c index 96e7dc361a..61f937b378 100644 --- a/src/cpu/samsung/exynos5250/cpu.c +++ b/src/cpu/samsung/exynos5250/cpu.c @@ -107,7 +107,7 @@ static void exynos_displayport_init(device_t dev) * * Note: We may want to do something clever to ensure the framebuffer * region is aligned such that we don't change dcache policy for other - * stuff inadvertantly. + * stuff inadvertently. */ uint32_t lower = ALIGN_DOWN(lcdbase, MiB); uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB); |