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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-14 05:41:41 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-15 06:55:59 +0000
commitfaf20d30a6e451d45e29613e3f4603dc72771843 (patch)
treed1c3df6e87473d66633fb3a4a8cec736fdda2cd7 /src/cpu/intel
parentf091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (diff)
soc/intel: Rename some SMM support functions
Rename southbridge_smm_X to smm_southbridge_X. Rename most southcluster_smm_X to smm_southbridge_X. Change-Id: I4f6f9207ba32cf51d75b9ca9230e38310a33a311 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34856 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/haswell.h7
-rw-r--r--src/cpu/intel/haswell/haswell_init.c3
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c3
-rw-r--r--src/cpu/intel/model_1067x/mp_init.c2
-rw-r--r--src/cpu/intel/model_2065x/model_2065x_init.c2
-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c2
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c2
7 files changed, 8 insertions, 13 deletions
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 7b3a203415..819c2e44f3 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -154,13 +154,6 @@ void intel_cpu_haswell_finalize_smm(void);
/* Configure power limits for turbo mode */
void set_power_limits(u8 power_limit_1_time);
int cpu_config_tdp_levels(void);
-void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
- uintptr_t staggered_smbase);
-void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
- size_t *smm_save_state_size);
-void smm_initialize(void);
-void smm_relocate(void);
-void smm_lock(void);
/* Determine if HyperThreading is disabled. The variable is not valid until
* setup_ap_init() has been called. */
#endif
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 0449235ba5..95f3d81a22 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -24,6 +24,7 @@
#include <cpu/x86/mp.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
+#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/speedstep.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/cache.h>
@@ -761,7 +762,7 @@ static void post_mp_init(void)
{
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
- southbridge_smm_enable_smi();
+ smm_southbridge_enable_smi();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index f3e0cbf240..23168efe74 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -25,6 +25,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/em64t101_save_state.h>
+#include <cpu/intel/smm_reloc.h>
#include <console/console.h>
#include <northbridge/intel/haswell/haswell.h>
#include <southbridge/intel/lynxpoint/pch.h>
@@ -325,7 +326,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
void smm_initialize(void)
{
/* Clear the SMM state in the southbridge. */
- southbridge_smm_clear_state();
+ smm_southbridge_clear_state();
/*
* Run the relocation handler for on the BSP to check and set up
diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
index 312660b0c3..44c5db2af7 100644
--- a/src/cpu/intel/model_1067x/mp_init.c
+++ b/src/cpu/intel/model_1067x/mp_init.c
@@ -94,7 +94,7 @@ static void post_mp_init(void)
{
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
- southbridge_smm_init();
+ smm_southbridge_enable_smi();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c
index b588095bf1..9d3d7ebbb2 100644
--- a/src/cpu/intel/model_2065x/model_2065x_init.c
+++ b/src/cpu/intel/model_2065x/model_2065x_init.c
@@ -316,7 +316,7 @@ static void post_mp_init(void)
{
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
- southbridge_smm_init();
+ smm_southbridge_enable_smi();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 4dbe4d91d2..02650d84eb 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -542,7 +542,7 @@ static void post_mp_init(void)
{
/* Now that all APs have been relocated as well as the BSP let SMIs
* start flowing. */
- southbridge_smm_init();
+ smm_southbridge_enable_smi();
/* Lock down the SMRAM space. */
smm_lock();
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index 8401611613..a26fefa1ce 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -202,7 +202,7 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
void smm_initialize(void)
{
/* Clear the SMM state in the southbridge. */
- southbridge_smm_clear_state();
+ smm_southbridge_clear_state();
/*
* Run the relocation handler for on the BSP to check and set up