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authorElyes HAOUAS <ehaouas@noos.fr>2019-10-27 13:09:37 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-19 05:23:25 +0000
commitdda17fa2220a4181971a0c6973aededea0e1517b (patch)
tree745e0d671b6dd072aaa7afd847ba55f13a7b162b /src/cpu/intel
parent88f107012abe6537fe7ce6d60a95aa66466ae2d1 (diff)
src: Use '#include <smp/node.h>' when appropriate
Change-Id: Icdd6b49751763ef0edd4c57e855cc1d042dc6d4d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36373 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c1
-rw-r--r--src/cpu/intel/model_2065x/model_2065x_init.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 8419746cdc..d259460dd7 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -27,6 +27,7 @@
#include <console/console.h>
#include <northbridge/intel/haswell/haswell.h>
#include <southbridge/intel/lynxpoint/pch.h>
+#include <smp/node.h>
#include "haswell.h"
#define MSR_PRMRR_PHYS_BASE 0x1f4
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c
index d7e84ec006..a9c28f6fdc 100644
--- a/src/cpu/intel/model_2065x/model_2065x_init.c
+++ b/src/cpu/intel/model_2065x/model_2065x_init.c
@@ -30,6 +30,7 @@
#include "chip.h"
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/common/common.h>
+#include <smp/node.h>
/*
* List of supported C-states in this processor