diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-07-13 16:44:18 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-14 17:33:34 +0000 |
| commit | acbf1541eeedec58ce8a31c6847b2296f40bf4bd (patch) | |
| tree | fb9ad109c676793801e824707f6f8d0d6c2cc9b1 /src/cpu/intel | |
| parent | bf1f1df41ba998a1c3898cd513a47ebdfd05609d (diff) | |
src: use mca_clear_status function instead of open coding
Change-Id: I53413b4051b79d7c2f24b1191ce877155e654400
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56259
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/intel')
| -rw-r--r-- | src/cpu/intel/haswell/haswell_init.c | 4 | ||||
| -rw-r--r-- | src/cpu/intel/model_2065x/model_2065x_init.c | 15 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 15 |
3 files changed, 5 insertions, 29 deletions
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 29c663e2e7..2c6384c4e3 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -527,12 +527,10 @@ static void configure_mca(void) for (i = 0; i < num_banks; i++) wrmsr(IA32_MC_CTL(i), msr); - msr.lo = msr.hi = 0; /* TODO(adurbin): This should only be done on a cold boot. Also, some * of these banks are core vs package scope. For now every CPU clears * every bank. */ - for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC_STATUS(i), msr); + mca_clear_status(); } /* All CPUs including BSP will run the following function. */ diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index fe5ac56e65..f70d7b2f5f 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -73,24 +73,13 @@ static void set_max_ratio(void) ((perf_ctl.lo >> 8) & 0xff) * IRONLAKE_BCLK); } -static void configure_mca(void) -{ - msr_t msr; - int i; - const unsigned int num_banks = mca_get_bank_count(); - - msr.lo = msr.hi = 0; - /* This should only be done on a cold boot */ - for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC_STATUS(i), msr); -} - static void model_2065x_init(struct device *cpu) { char processor_name[49]; /* Clear out pending MCEs */ - configure_mca(); + /* This should only be done on a cold boot */ + mca_clear_status(); /* Print processor name */ fill_processor_name(processor_name); diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 541cb3bc67..09cad24b8b 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -297,18 +297,6 @@ unsigned int smbios_processor_external_clock(void) return SANDYBRIDGE_BCLK; } -static void configure_mca(void) -{ - msr_t msr; - int i; - const unsigned int num_banks = mca_get_bank_count(); - - msr.lo = msr.hi = 0; - /* This should only be done on a cold boot */ - for (i = 0; i < num_banks; i++) - wrmsr(IA32_MC_STATUS(i), msr); -} - static void model_206ax_report(void) { static const char *const mode[] = {"NOT ", ""}; @@ -340,7 +328,8 @@ static void model_206ax_init(struct device *cpu) { /* Clear out pending MCEs */ - configure_mca(); + /* This should only be done on a cold boot */ + mca_clear_status(); /* Print infos */ model_206ax_report(); |