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authorMartin Roth <gaumless@gmail.com>2022-11-20 19:32:51 -0700
committerMartin L Roth <gaumless@gmail.com>2022-11-23 03:47:18 +0000
commitc87ab01c2d2e70c64d88d3afd4d49a0687b05b3c (patch)
treeacb2ec7d48f9600b787b0a1cdd528a5e5e20e630 /src/cpu/intel/model_6ex
parent4911942e949f40d0da0ed7debeadef1f3eccf17c (diff)
cpu/intel/car: Define post codes
This moves a lot of post code values, but unifies them between platforms, so that the same value means the same thing as much as possible. The P4-netburst code was the most extensive and most different, so that dictated the majority of the values. Three were two values there that didn't match the other files, so those two values, 0x22 & 0x29 have duplicate entries in the table. The rest of the entries are similar between platforms, though the values for many of them were moved to match the P4-netburst values. POST_BOOTBLOCK and POST_POSTCAR values are intended to eventually become global, while POST_SOC would be specific to the Intel platforms. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: If13e40b700a41d56bca85510d68da0ab31a235a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69866 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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