diff options
| author | Joey Peng <joey.peng@lcfc.corp-partner.google.com> | 2022-03-28 10:58:05 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-07 20:48:18 +0000 |
| commit | c0c40b94e366dcd60c9a9ac48035fda59444588d (patch) | |
| tree | 46e8b0c3f167c0cb2e4f0c5df6b881b9f88c98fb /src/cpu/intel/common | |
| parent | 52479c7919438d75e0310b619eba530a5cc0e151 (diff) | |
mb/google/brya/var/taniks: Enable Genesys L1 max entry delay
The workaround causes the eMMC controller to not enter its L1
during the boot process
BUG=b:220079865
TEST=Build FW and run stress exceed 2500 cycles.
Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: I2a5888e943c1ebf83a54f9b172f986f8b13d9b6a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63131
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/cpu/intel/common')
0 files changed, 0 insertions, 0 deletions