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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-27 13:24:11 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-08 19:46:25 +0100 |
commit | 8160a2f63db5a04a846b434701a88b449cc6f05f (patch) | |
tree | 280f60e27488db9189b973be05abafc62e108496 /src/cpu/intel/car | |
parent | 19652e6f408851826386d52458ae21e617af8276 (diff) |
intel post-car: Split legacy sockets
Move old sockets to use romstage_legacy.c, these are ones
using intel/car/cache_as_ram.inc.
These will not be converted to RELOCATABLE_RAMSTAGE as boards
are candidates for getting dropped from the tree anyways.
Change-Id: I2616b4edee53446f1875711291e9dfed2911e2fb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17280
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/intel/car')
-rw-r--r-- | src/cpu/intel/car/romstage_legacy.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/cpu/intel/car/romstage_legacy.c b/src/cpu/intel/car/romstage_legacy.c new file mode 100644 index 0000000000..560cd7af2a --- /dev/null +++ b/src/cpu/intel/car/romstage_legacy.c @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <cpu/intel/romstage.h> + +void * asmlinkage romstage_main(unsigned long bist) +{ + mainboard_romstage_entry(bist); + return (void*)CONFIG_RAMTOP; +} |