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authorMartin Roth <martin.roth@se-eng.com>2013-07-08 16:23:54 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-11 22:36:59 +0200
commit4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c (patch)
tree6bd8440a05f6ea1184c0a5500d43cc92ab683f01 /src/cpu/amd/car
parent0cb07e3476d9408d0935253f9f26c0a8ddc28401 (diff)
cpu: Fix spelling
Change-Id: I69c46648de0689e9bed84c7726906024ad65e769 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/3729 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/cpu/amd/car')
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 68e7c09ad3..18c278e41a 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -88,7 +88,7 @@ static void post_cache_as_ram(void)
#endif
#if 1
{
- /* Check value of esp to verify if we have enough rom for stack in Cache as RAM */
+ /* Check value of esp to verify if we have enough room for stack in Cache as RAM */
unsigned v_esp;
__asm__ volatile (
"movl %%esp, %0\n\t"
@@ -123,7 +123,7 @@ static void post_cache_as_ram(void)
/* set new esp */ /* before CONFIG_RAMBASE */
"subl %0, %%esp\n\t"
::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )
- /* discard all registers (eax is used for %0), so gcc redo everything
+ /* discard all registers (eax is used for %0), so gcc redoes everything
after the stack is moved */
: "cc", "memory", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp"
);