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authorUwe Hermann <uwe@hermann-uwe.de>2010-09-27 18:03:18 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-09-27 18:03:18 +0000
commit7ac4c26177713cf2b1ada8c8d377929aedd109e4 (patch)
treeebd432fa8c255c5fa349eb153fdf0a6d9acfabf9 /src/console
parent5211a7023e90580505acc4eda855206540f588c7 (diff)
Add a kconfig option to allow the user to select a specific physical
USB port for use as Debug Port (on chipsets which support that). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/console')
-rw-r--r--src/console/Kconfig21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/console/Kconfig b/src/console/Kconfig
index fa6f840035..3b8fb02dca 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -112,6 +112,27 @@ config USBDEBUG
If unsure, say N.
+# Note: This option doesn't make sense on Intel ICH southbridges as those
+# hardcode the physical USB port to be used as Debug Port to 1. It cannot
+# be changed by coreboot.
+config USBDEBUG_DEFAULT_PORT
+ int "Default USB port to use as Debug Port"
+ default 1
+ depends on USBDEBUG && !SOUTHBRIDGE_INTEL_I82801GX
+ help
+ This option selects which physical USB port coreboot will try to
+ use as EHCI Debug Port first (valid values are: 1-15).
+
+ If coreboot doesn't detect an EHCI Debug Port dongle on this port,
+ it will try all the other ports one after the other. This will take
+ a few seconds of time though, and thus slow down the booting process.
+
+ Hence, if you select the correct port here, you can speed up
+ your boot time. Which USB port number (1-15) refers to which
+ actual port on your mainboard (potentially also USB pin headers
+ on your mainboard) is highly board-specific, and you'll likely
+ have to find out by trial-and-error.
+
config CONSOLE_VGA
bool "Use VGA console once initialized"
default n