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author | Subrata Banik <subrata.banik@intel.com> | 2020-04-13 12:23:07 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-05-23 07:34:30 +0000 |
commit | 41aab355c18f81f4788d64f8083f721d455f2a4d (patch) | |
tree | 9a08d5cceec8a2c55b9a86789e83cd10693a356b /src/commonlib/storage/storage.h | |
parent | ebf1daa001025377dd1f34ecbfe42b224109ba1f (diff) |
soc/intel/common/block: Update SA resource length to support 64 bit
This patch provides an option for accommodating 64 bit width resource
request with CONFIG_PCI_SEGMENT_GROUPS = 16 refer as PCIEX BAR length 4096MB
(Bus 0-4095).
Change-Id: I9a8448af7e9f26c8e0176e58e4fe253a6e77b69a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40336
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib/storage/storage.h')
0 files changed, 0 insertions, 0 deletions