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authorRaul E Rangel <rrangel@chromium.org>2021-07-23 16:43:18 -0600
committerPatrick Georgi <pgeorgi@google.com>2021-11-04 10:35:10 +0000
commit90cec2df136d4e5c94b870afa0a31c91f4a5cbd9 (patch)
treeb84767bcb5645d27ddd2a93236c969f9917818d8 /src/arch
parentcf17cd81d3e7f098fdef8d3af6f167409e1b157e (diff)
arch/x86/Makefile: Align VGA_BIOS to 64 bytes when using AMD LPC SPI DMA
AMD platforms require the SPI contents to be 64 byte aligned in order to use the SPI DMA controller. BUG=b:179699789 TEST=Build guybrush and verify cbfs was invoked with -a 64 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I842c85288acd8f7ac99b127c94b1cf235e264ea2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56579 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/Makefile.inc7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index e91ddac82d..458bcc637e 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -43,6 +43,13 @@ cbfs-files-$(CONFIG_VGA_BIOS_DGPU) += pci$(stripped_vgabios_dgpu_id).rom
pci$(stripped_vgabios_dgpu_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_DGPU_FILE))
pci$(stripped_vgabios_dgpu_id).rom-type := optionrom
+# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
+ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
+pci$(stripped_vgabios_id).rom-align := 64
+pci$(stripped_second_vbios_id).rom-align := 64
+pci$(stripped_vgabios_dgpu_id).rom-align := 64
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
+
###############################################################################
# common support for early assembly includes
###############################################################################