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| author | Patrick Rudolph <siro@das-labor.org> | 2015-12-26 08:33:16 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-16 21:19:51 +0100 |
| commit | 59de6c9c71582798a9e24bfe6373fc995ec495cd (patch) | |
| tree | 0e4d2348bcabd13e5008384d29dca2c615c57186 /src/arch/riscv | |
| parent | 7ee16b7348640729c48e5459ba2c9142202238fa (diff) | |
southbridge/intel/common: Add common gpio.c
Add a common southbridge gpio code to reduce existing
duplicated code.
By adding it to ram-stage, GPIOs can be changed any time,
without the need of direct register access.
The files are based on bd82x6x and lynxpoint gpio.c.
Change-Id: Iaf0c2f941f2625a5547f9cba79da1b173da6f295
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/12893
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions