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author | Jeffy Chen <jeffy.chen@rock-chips.com> | 2016-09-02 18:16:33 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2016-10-06 21:49:06 +0200 |
commit | dd42db63489d2a2021f40aec894b1eded62e9a04 (patch) | |
tree | 029e6ec7bcb3a5aa1251709fcf6a22ca4c46eaf4 /src/arch/riscv | |
parent | 7f965891b6d95bf3c347d955502505597d45a7d7 (diff) |
google/veyron_rialto: Add lpddr3-K4E6E304EB-2GB-1CH memory configuration
Add lpddr3-K4E6E304EB-2GB-1CH memory configuration for rialto.
BUG=chrome-os-partner:56759
BRANCH=none
TEST=Build
Change-Id: I698fe450d48b64a06232aa44ecf91d688d9dc17a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d3edecdb135939c3264ab1b831e7821d3a3e0149
Original-Change-Id: I7dae9fd822abeff5b08de0ab9262e1817ac58531
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/380443
Original-Commit-Ready: Alexandru Stan <amstan@chromium.org>
Original-Tested-by: Alexandru Stan <amstan@chromium.org>
Original-Reviewed-by: Alexandru Stan <amstan@chromium.org>
Original-Reviewed-by: Jonathan Dixon <joth@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16699
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions